TECHnalysis Research Guest Column

June 9, 2015
The New Semiconductor Challenge: Doing More Without Moore

Over the last 50 years, one could make the argument that a good percentage of the innovations in the semiconductor business have been closely tied to Moore's Law. Credited to Intel co-founder Gordon Moore, this 50 year-old axiom basically states that transistor size will roughly shrink by half every 18-24 months.

Though there have been significant challenges along the way, the law has proven remarkably prescient in predicting a key element in the ongoing innovation cycles of the chips we find in the heart of all our devices: how small the transistors would get and, therefore, how many we could fit within a reasonably-sized silicon die.

The end result is that we're now seeing CPUs and other chips being built with 14 nm (nanometer) transistors, with plans and development in place for iterations at 10 nm and then down to 7 nm—at least for higher-end parts like CPUs. However, there are serious questions being raised about going much beyond 7 nm—after all, we're talking the width of several atoms at that point—so there are concerns about how far this can go. Even Gordon Moore admitted recently that he never expected this law to go on forever—in fact, it's lasted even longer than he originally thought.

There have been serious challenges to Moore's Law in the past, and they somehow were overcome. It's certainly possible extreme ultraviolet lithography and other advanced technologies may provide an answer here to these newest challenges. Even if they do, however, what's also becoming apparent is that some semiconductor manufacturers may not be able to keep up. In other words, while Intel may be able to continue both designing and manufacturing smaller transistors, not all of their semiconductor manufacturing competitors will be able to.

As a result, we've started to see a new set of challenges for chip designers: how to make improvements without the inherent benefits of shrinking transistors and the ability this enables to fit more of them (and, therefore, more capability and functionality) within the same-sized chip as previous generations. Of course, many companies have been doing this for a while. Intel's famous "tick-tock" cadence of new chip designs, for example, had one generation that primarily benefited from the Moore's Law shrink to smaller transistors (often called a new process node technology) and then the next one used the same transistor size, but incorporated more features, more efficient designs, etc.

What's interesting now is that we're starting to see companies doing this even with older generation process node technologies. In AMD's recent introduction of their next generation A-series APU chip (codenamed "Carrizo") from last week's Computex trade show in Taiwan, for example, AMD made a point to say they were still providing innovations on 28 nm transistor technology (essentially several generations back from today's cutting edge—from a process perspective).

Despite this apparent handicap, AMD managed to create a new CPU design that offers 2.4 times greater performance per watt than its predecessor, while also offering better battery life and a range of new features, including better graphics and a refined cache architecture. While other companies can also generate performance improvements within same the process node size (and have done so), in AMD's recent case, the improvement was larger than we've seen in the past.

Moving forward, given all the potential challenges that node size reductions are expected to face, I think we'll start to see a lot more examples of this kind of improvement on existing process technologies. In fact, the real art in semiconductor design will be based on how effective vendors can be at wringing more performance and capabilities from a given transistor size.

Ironically, it seems many engineers do their best work when they're faced with limitations, so these upcoming challenges could actually end up driving more innovations in semiconductors than we've seen in quite some time. Getting more without Moore won't be easy, but it could lead to some exciting stuff.

Here's a link to the original column: http://www.engadget.com/2015/06/09/the-new-semiconductor-challenge-doing-more-without-moore/

Bob O'Donnell is founder and chief analyst of TECHnalysis Research, a technology consulting and market research firm that provides strategic consulting and market research services.